TSMC announced at the European Open Innovation Platform Forum that electronic design automation (EDA) tools and third-party IP modules are ready for TSMC's performance enhanced N2P and N2X process technologies (at the 2-nanometer level). This means that various chip design manufacturers can now develop chips based on TSMC's second-generation 2nm level production nodes, taking advantage of the GAA transistor architecture and low resistance capacitors. At present, all major tools of Cadence and Synopsys, as well as simulation and electromigration tools of Siemens EDA and Ansys, are ready for TSMC's N2P manufacturing process.