TSMC releases its product planning blueprint, which is expected to enter the 1nm era by 2030. At the 2023 IEEE International Conference on Electronic Components, TSMC recently released its product planning blueprint for entering the 1nm process. It is expected to provide over 1 trillion transistors in 3D packaging by 2030, and the company is developing chips with 200 billion transistors in a monolithic architecture. In order to achieve this goal, the company reiterates its commitment to developing 2nm level N2 and N2P production nodes, 1.4nm level A14 and 1nm level A10 manufacturing processes, which are expected to be completed by 2030.